1. Field of the Invention
The invention relates to comparator circuits and more particularly to a comparator circuit which is implemented in CMOS transistor technology.
2. Description of the Prior Art
In manufacturing a chopper stabilized comparator in CMOS technology, a problem arises in the fabrication of the MOS switches. If there is a mismatch between the internal capacitance of the transistor switches this generates a considerable offset voltage internally within the circuit. What causes the mismatch in the balance of the capacitors is the alignment of the mask used to fabricate the source and drain areas.
It is therefore an object of this invention to provide a novel circuit layout wherein the alignment of the mask during manufacture is not critical.
A further problem of the prior art is that underneath the gate electrodes the drain and the source protrude into the gate area. First, because of alignment and secondly because of lateral diffusion. During the manufacturing process, the lateral diffusion error varies from unit to unit.
It is therefore a further object of the invention to manufacture CMOS switches which are not sensitive to lateral diffusion.